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Home | Projects - Industry Driven/Sponsored

RECOMP

Reduced Certification Costs for Trusted Multi-core Platforms
Artemis 100202
3 years (Apr 2010 to Apr 2013)
Sponsors:Artemis Joint Undertaking
Industry Leaders:Thales
EADS
Infineon
Partners:CISTER/ISEP

Contact Person at CISTER:Stefan M. Petters
Summary:RECOMP recognizes the fact that the increasing processing power of embedded systems is mainly provided by increasing the number of processing cores. The increased numbers of cores is commonly regarded as a design challenge in the safety-critical area, as there are no established approaches to achieve certification. At the same time there is an increased need for flexibility in the products in the safety-critical market. This need for flexibility puts new requirements on the customization and the upgradability of both the non-safety and safety-critical critical part. The difficulty with this is the large cost in both effort and money of the re-certification of the modified software, which means that companies cannot fully leverage the advantages of modular software system. RECOMP will provide reference designs and platform architectures together with the required design methods and tools for achieving cost-effective certification and re-certification of mixed-criticality, component based, multi-core systems. The aim of RECOMP is to define a European standard reference technology for mixed-criticality multi-core systems supported by the European tool vendors participating in RECOMP.
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       
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Conferences and Workshops
Conjecture about global fixed-priority preemptive multiprocessor scheduling of implicit-deadline sporadic tasks: The utilization bound of SM-US(sqrt(2)-1) is sqrt(2)-1 HURRAY-TR-100512 
Björn Andersson (29, May, 2010)
ABSTRACT | PDF
The paper has been published at RTSOPS 2010: 1st International Real-Time Scheduling Open Problems Seminar, July 6, 2010, Brussels, Belgium, in conjunction with the 22th Euromicro Intl Conference on Real-Time Systems, July 7-9, 2010, Brussels, Belgium
Implementing Multicore Real-Time Scheduling Algorithms Based on Task Splitting Using Ada 2012 HURRAY-TR-100301 
Björn Andersson, Luis Miguel Pinho (10, Mar, 2010)
ABSTRACT | PDF
in Proceedings of the 15th International Conference on Reliable Software Technologies (Ada-Europe 2010), Valencia, Spain.
Technical Reports
Assigning Real-Time Tasks on Heterogeneous Multiprocessors with Two Unrelated Types of Processors HURRAY-TR-100505 
Björn Andersson, Gurulingesh Raravi, Konstantinos Bletsas (16, May, 2010)
ABSTRACT | PDF
A 12*(1+|R|/(4m))-speed algorithm for scheduling constrained-deadline sporadic real-time tasks on a multiprocessor comprising m processors where a task may request one of |R| sequentially-reusable shared resources HURRAY-TR-100201 
Björn Andersson, Arvind Easwaran (3, Feb, 2010)
ABSTRACT | PDF
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