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Dakshina Dasari (Publications)

Dakshina Dasari (Publications)

Dakshina Dasari (Publications)

PhD University of Porto, Portugal
Research Associate
September 2009 - May 2014

Dakshina Dasari was born in 1980 in India. She has a Bachelors Degree from Karnataka University Dharwad and finished her Masters in 2004 from National Institute of Technology, Surathkal (NITK), India. She has five years of working experience - 3 yrs at Sun Microsystems and 2 yrs at Citrix Pvt Ltd as Software Engineer. She has previously worked in the area of Networking.

She has completed her PhD in the area of Timing Analysis of Real-Time Systems in Multicores Interconnection Networks in May 2014.

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Thesis
Timing Analysis of Real-Time Systems Considering the Contention on the Shared Interconnection Network in Multicores CISTER-TR-140522 
Dakshina DasariPhD Thesis. May 2014. Porto, Portugal.
Journal Papers
Time-Triggered Co-Scheduling of Computation and Communication with Jitter Requirements CISTER-TR-170702 
Anna Minaeva, Benny Åkesson, Zdeněk Hanzálek, Dakshina DasariTo be published in IEEE Transactions on Computers, IEEE. 1, Jan, 2018, Volume 67, Issue 1, pp 115-129.
A framework for memory contention analysis in multi-core platforms CISTER-TR-150510 
Dakshina Dasari, Vincent Nélis, Benny ÅkessonReal-Time Systems (RTS), Springer. May 2016, Volume 52, Issue 3, pp 272-322. U.S.A..
NoC Contention Analysis using a Branch and Prune Algorithm CISTER-TR-131107 
Dakshina Dasari, Borislav Nikolic, Vincent Nélis, Stefan M. PettersTransactions in Embedded Computing Systems (DCMP 12), Article No 113, ACM. Mar 2014, Volume 13, Issue 3s, 26 pages. New York, NY, U.S.A..
Conference or Workshop Papers
Partitioning and Analysis of the Network-on-Chip on a COTS Many-Core Platform CISTER-TR-170302 
Matthias Becker, Borislav Nikolic, Dakshina Dasari, Benny Åkesson, Vincent Nélis, Moris Behnam, Thomas Nolte24th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2017). 18 to 20, Apr, 2017, pp 101-112. Pittsburgh, U.S.A..
Contention-Free Execution of Automotive Applications on a Clustered Many-Core Platform CISTER-TR-160505 
Matthias Becker, Dakshina Dasari, Borislav Nikolic, Benny Åkesson, Vincent Nélis, Thomas Nolte28th Euromicro Conference on Real-Time Systems (ECRTS 2016). 5 to 8, Jul, 2016. Toulouse, France.
Investigation on AUTOSAR-Compliant Solutions for Many-Core Architectures CISTER-TR-150606 
Matthias Becker, Dakshina Dasari, Vincent Nélis, Moris Behnam, Luis Miguel Pinho, Thomas NolteThe Euromicro Conference on Digital System Design (DSD 2015). 26 to 28, Aug, 2015. Funchal, Portugal.
Partitioning the Network-on-Chip to Enable Virtualization on Many-Core Processors CISTER-TR-150608 
Matthias Becker, Dakshina Dasari, Vincent Nélis, Moris Behnam, Thomas NolteThe 6th International Real-Time Scheduling Open Problems Seminar (RTSOPS 2015). 7, Jul, 2015. Lund, Sweden.
Timing analysis of PCM Main Memory in Multicore Systems CISTER-TR-130605 
Dakshina Dasari, Vincent Nélis, Daniel Mossé19th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2013), IEEE. 19 to 21, Aug, 2013, pp 52-61. Taipei, Taiwan.
Identifying the Sources of Unpredictability in COTS-based Multicore Systems CISTER-TR-130604 
Dakshina Dasari, Benny Åkesson, Vincent Nélis, Muhammad Ali Awan, Stefan M. Petters8th IEEE International Symposium on Industrial Embedded Systems (SIES 2013), IEEE. 19 to 21, Jun, 2013, pp 39-48. Porto, Portugal.
An Analysis of the Impact of Bus Contention on the WCET in Multicores HURRAY-TR-120504 
Dakshina Dasari, Vincent Nélis9th IEEE International Conference on Embedded Software and Systems (ICESS 2012), IEEE. 25 to 27, Jun, 2012, pp 1450-1457. Liverpool, United Kingdom.
A Tighter Analysis of the Worst-Case End-to-End Communication Delay in Massive Multicores HURRAY-TR-111207 
Vincent Nélis, Dakshina Dasari, Borislav Nikolic, Stefan M. Petters32nd IEEE Real-Time Systems Symposium (RTSS 2011). 29, Nov to 2, Dec, 2011, Work-In-Progress Session. Vienna, Austria.
Response Time Analysis of COTS-Based Multicores Considering The Contention On The Shared Memory Bus HURRAY-TR-110705 
Dakshina Dasari, Björn Andersson, Vincent Nélis, Stefan M. Petters, Arvind Easwaran, Jinkyu Lee8th IEEE International Conference on Embedded Software and Systems (IEEE ICESS-11), IEEE. 16 to 18, Nov, 2011, pp 1068-1075. Changsha, China.
WCET Analysis Considering Contention on Memory Bus in COTS-Based Multicores HURRAY-TR-111001 
Dakshina Dasari, Vincent Nélis, Björn Andersson16th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA 2011). 5 to 9, Sep, 2011, Work-In-Progress Session. Toulouse, France.
Conference or Workshop Posters/Demos
Workload Mapping and Resource Management in Many-Core Platforms CISTER-TR-140618 
Borislav Nikolic, Dakshina Dasari, Hazem Ali, Stefan M. Petters, Vincent NélisPoster presented in 8th IEEE International Symposium on Industrial Embedded Systems (SIES'13). 19 to 21, Jun, 2013. Porto, Portugal.
Multi-Processor Scheduling: Paradigms and Challenges CISTER-TR-130610 
Geoffrey Nelissen, Gurulingesh Raravi, Konstantinos Bletsas, Vincent Nélis, Dakshina Dasari, Pedro Souto, Eduardo TovarPoster presented in 8th IEEE International Symposium on Industrial Embedded Systems (SIES'13). 19 to 21, Jun, 2013. Porto, Portugal.
Certification Challenges for Mixed Criticality Systems in Multicores CISTER-TR-140621 
Dakshina Dasari, Muhammad Ali Awan, Vincent Nélis, Stefan M. PettersPoster presented in 8th IEEE International Symposium on Industrial Embedded Systems (SIES'13). 19 to 21, Jun, 2013. Porto, Portugal.
Technical Reports
A Tighter Analysis of the Worst-Case End-to-End Communication Delay in Massive Multicores HURRAY-TR-120904 
Dakshina Dasari, Borislav Nikolic, Vincent Nélis, Stefan M. Petters28, Jun, 2012. Porto, Portugal.