Seminar Series 2015 - Benny Åkesson

Seminar Series 2015 - Benny Åkesson

Towards Certifiable Resource Sharing in Safety-Critical Multi-Core Real-Time Systems
6, Nov, 2015 11:30-12:30 (1 hour)
CISTER, Porto, Portugal

The proliferation of multi-core platforms has had great impact on embedded computing. Multiple cores exploiting task-level parallelism offer performance far beyond what is possible with a single core, while staying within an acceptable power envelope. Since resources, such as interconnect and memories, are often shared between cores, the platforms have also become increasingly cost efficient. However, resource sharing results in interference between concurrently executing applications, which causes problems in real-time systems where such interference must be either bounded or completely eliminated. As a result, safety-critical systems, for example in the avionics domain, have not yet been able to capitalize on the benefits of multi-core platforms due to stringent certification requirements.

This presentation discusses the state-of-the-art in resource sharing in multi-core systems and its application to safety-critical real-time systems. First, a survey of efforts to build time-predictable resources, such as interconnects and memory controllers, is provided. Then, software-based interference mitigation mechanisms and analyses for these resources in commercial-of-the-shelf platforms are discussed. This is followed by an overview of the approach proposed by Airbus Group Innovations to manage interference and compute worst-case execution times of applications running on a Freescale P4080 multi-core platform. The presentation is concluded by highlighting open issues and future directions towards certifiable resource sharing in safety-critical multi-core real-time systems.


PDF Presentation (3MB)

CISTER's main roles:
Benny Åkesson

S101 Auditorium/Seminar Room
1st Floor

Event-related Photos and Videos