Keynote Speakers
On the three central days of the conference week, a keynote will be delivered as the opening event to address hot topics of relevance in the conference scope.
Alan Burns
University of York, UK
Why the Expressive Power of Languages such as Ada is needed for Future Cyber Physical Systems
(Tuesday 14th, Aula Magna)
Chair: Giorgio Buttazzo
Abstract. If Cyber Physical Systems (CPS) are to be built with efficient resource utilisation it is imperative that they exploit the wealth of scheduling theory available. Many forms of real-time scheduling, and its associated analysis, are applicable to CPS, but it is not clear how the system developer/programmer can gain access to this theory when real CPS are being constructed. The aim of the presentation is to show that Ada provides most of the programming abstractions needed to deliver future CPS.
Short Bio.Professor Alan Burns is a member of the Department of Computer Science, University of York, U.K. His research interests cover a number of aspects of real-time systems including the assessment of languages for use in the real-time domain, distributed operating systems, the formal specification of scheduling algorithms and implementation strategies, and the design of dependable user interfaces to real-time applications. Professor Burns has authored/co-authored over 500 papers/reports and books. Most of these are in the real-time area. His teaching activities include courses in Operating Systems and Real-time Systems. In 2009 Professor Burns was elected a Fellow of the Royal Academy of Engineering. In 2012 he was elected a Fellow of the IEEE.
Guido Ghisio
Magneti Marelli, Italy
Challenges for the Automotive Platform of the Future
(Wednesday 15th, Aula Magna)
Chair: Marko Bertogna
Abstract. This talk will describe what a vehicle once was, and what it will be in the future. From the point of view as Tier1, we will show how the same concept of “car” will be impacted by those technologies currently in development, like introduction of increasingly invasive ADAS (advanced driver assistance systems); the strong drive to realise autonomous vehicles; the growing focus on Functional Safety and Reliability; increasing availability and affordability of low-power high-performance computing also in automotive; integration of many more functions in single, more powerful, general-purpose ECUs; the trend towards distributed development; the needs of SW reusability and portability. All these topics will have to be considered in the future evolution of the current, universally-accepted automotive platform: AUTOSAR.
Short Bio. Guido Ghisio obtained his Master Degree on Electronic Engineering at the Polytechnic of Turin in 1979. He began to work in CSELT (Telecom research labs) in 1980 and was involved in Image Processing studies, and Integrated Circuits Design. He joined Magneti Marelli Electronic Systems in 1988 as Responsible of the IC design group. He was involved as Project leader in several instrument clusters and body electronics designs. As Program Manager, he was Responsible for Body electronics and Telematics developments. Since 2006, he has been responsible for the ADAS development inside of the Innovation Dept. He has been in charge of the projects on Sensors for Environmental Perception and on Electronic Horizon up to 2013. He currently leads the Automated Driving Technologies group inside the Technology Innovation Department, specifically focused on Autonomous Vehicle developments. He has been author of several patents and papers.
Marc Duranton
CEA, France
The HiPEAC Vision
(Thursday 16th, Aula Magna)
Chair: Luis Miguel Pinho
Abstract. The HiPEAC vision is a bi-annual document produced by the European Network on High Performance and Embedded Architecture and Compilation (HiPEAC). It presents the upcoming challenges in computing systems. The last release presents its recommendations for Horizon 2020 based on an analysis of market trends, a discussion of technology constraints and opportunities, and a review of Europe’s strengths and weaknesses in the field of computing systems. The HiPEAC roadmap calls particular attention to the EU’s position as it poises to enter a new phase of scientific innovation. To ensure the further growth of information technology several key challenges need to be tackled: Future computing systems will have to be more reliable - preferably secure, safe and dependable by design; As the complexity of systems will further increase, we need better tools to manage this increase in overall complexity; We need a more holistic approach to system design, taking into account functionaland non-functional requirements; We need models and techniques for information systems to naturally interact, analyze and interpret the physical world; Energy is currently the limiting factor of performance. We need solutions to dramatically increase the energy efficiency of information systems; In the next decade, several exponential growth laws will slow down. We must search for and industrially develop alternative technologies to continue the performance growth of information systems. The vision document is the result a wide consultation among the 1500 members of the HiPEAC network.
Short Bio. Dr. Marc Duranton is a senior member of a department common to Leti and List, both part of the Research and Technology Department of CEA (French Atomic Energy Commission). He previously spent more than 23 years in Philips, Philips Semiconductors and NXP Semiconductors. He has two MSc degrees, in electrical engineering and in computer science, from ENSERG and from ENSIMAG, both in Grenoble and a PhD in signal and image processing from Institut National Polytechnique de Grenoble. He is currently working on projects related to IoT and High Performance Computing, and on architectures for Neural Network. He worked within Philips Semiconductors in California on several video coprocessors for the VLIW processor TriMedia and for various Nexperia platforms. In NXP Eindhoven (The Netherlands), he led the Ne-XVP project that targeted the design of the hardware and software of a multi-core processor for real-time applications and for consumer video processing. He also led the architecture of the family of L-Neuro chips, digital processors using neural networks techniques. His research interests include parallel and high performance architectures for real-time processing, domain specific architectures, accelerators for Neural-Network models of computation, compiler technology and emerging paradigms for computing systems. He has published several articles and book chapters, and more than 30 patents. He is in charge of the roadmap activity in the Network of Excellence HiPEAC on High Performance and Embedded Architecture and Compilation, feely available at http://www.hipeac.net/roadmap.