Work-in-Progress: A Holistic Approach to WCRT Analysis for Multicore Systems
Ref: CISTER-TR-220907 Publication Date: 5 to 8, Dec, 2022
Work-in-Progress: A Holistic Approach to WCRT Analysis for Multicore SystemsRef: CISTER-TR-220907 Publication Date: 5 to 8, Dec, 2022
Multicore platforms share the hardware resources such as caches, interconnects, and main memory among all the cores. Due to such sharing, tasks running on different cores compete to access these shared resources which increases the execution times of those tasks in a non-deterministic manner. This is problematic for systems that run applications with stringent timing requirements. To address this issue, we propose a holistic analysis to bound the maximum inter-core contention that can be suffered by tasks from tasks running on other cores.
43rd Real-Time Systems Symposium (RTSS 2022), WiP.
Houston, Texas, U.S.A..
Record Date: 30, Sep, 2022
Short links for this page: www.cister.isep.pt/docs/10_1109_rtss55097_2022_00054 www.cister.isep.pt/docs/cister_tr_220907 www.cister.isep.pt/docs/1823