Finding an Upper Bound on the Increase in Execution Time Due to Contention on the Memory Bus in COTS-Based Multicore Systems
Ref: HURRAY-TR-100104 Publication Date: Jan 2010
Finding an Upper Bound on the Increase in Execution Time Due to Contention on the Memory Bus in COTS-Based Multicore SystemsRef: HURRAY-TR-100104 Publication Date: Jan 2010
Contention on the memory bus in COTS based multicore systems is becoming a major determining factor of the execution time of a task. Analyzing this extra execution time is non-trivial because (i) bus arbitration protocols in such systems are often undocumented and (ii) the times when the memory bus is requested to be used are not explicitly controlled by the operating system scheduler; they are instead a result of cache misses. We present a method for finding an upper bound on the extra execution time of a task due to contention on the memory bus in COTS based multicore systems. This method makes no assumptions on the bus arbitration protocol (other than assuming that it is work-conserving).
Published in SIGBED Review, Special Issue on the Work-in-Progress (WIP) Session at the 2009 IEEE Real-Time Systems Symposium (RTSS), Volume 7, Issue 1, Article No 4.
New York, U.S.A..
Notes: This article was selected as one of the top 5 from among 24 papers in the Work-in-Progress session of RTSS 2009.
Record Date: 25, Jan, 2010
Short links for this page: www.cister.isep.pt/docs/10_1145_1851166_1851172 www.cister.isep.pt/docs/hurray_tr_100104 www.cister.isep.pt/docs/537