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  • Ongoing Project:
    THERMAC

    Thermal-aware Resource Management for Modern Computing Platforms in the Next Generation of Aircraft
    Find out more...

  • Ongoing Project:
    PReFECT

    Predictable Multiprocessor Platforms for Embedded Safety Critical Systems
    Find out more...

  • Ongoing Project:
    ARNET

    Airborne Relaying Networks for Reliable and Secure Mobile Communications
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  • Ongoing Project:
    REASSURE

    Secure Runtime Verification for Reliable Real-Time Embedded Software
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  • Ongoing Project:
    5GSDN

    MAC-PHY cross-layer design and multi-objective optimisation of 5G Software defined networks
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15, Jan, 2021

Fundamental Research Activities

CISTER builds Artificial Intelligence of things in critical real-time systems with in new InSecTT project

The Project INSECTT (Intelligent Secure Trustable Things) addresses the convergence of trustable and explainable artificial intelligence (AI) algorithms for the IoT (Internet of Things). INSECTT looks at the future of the technology of Artificial Intelligence of things (AIoT), particularly at the edge of the network, addressing issues of security, latency, privacy and safety. INSECTT consists of 52 EU and Turkish partners in 21 use cases of a diverse set of industrial domains such as: transportation, autonomous vehicles, aeronautics, healthcare, railway and building.

CISTER/ISEP is one of the core partners of this project, with contributions in different building blocks spanning dependable wireless solutions, trustworthiness and explainable AI methodologies, and real time critical systems components. CISTER/ISEP is leader of the use case of Wireless avionics intra-communications (WAICs), leader of the reference architecture of the project, core member of the technical board of the project, and contributor in the wireless platoon vehicle, and wireless security test use cases.
More information can be found in the InSecTT website, its Twitter and YouTube social accounts.
InSecTT has received funding from the ECSEL Joint Undertaking (JU) under grant agreement No 876038.

15, Jan, 2021

Fundamental Research Activities

New VALU3S project tackles Verification & Validation on automated systems

Verification & Validation (V&V) remains as a major challenge in the development of safety-critical systems. Current V&V technology is known to be time consuming, costly, and mostly focused on the functionality aspects of systems. However, with the raising complexity associated with systems becoming more automated, open, and connected, other key properties such as security and privacy must be taken into account in the V&V methods.
The goal of VALU3S project is to design, implement, and evaluate state-of-the-art methods and tools that reduce the time and cost needed to perform V&V on automated systems with respect to Safety and Security requirements. For that, the project will design and implement a multi-dimensional, multi-layered framework where test cases and scenarios arising from 13 use cases, from 6 different application domains, are evaluated by state-of-the-art methods and tools developed/improved in the project, while adhering to relevant standards.

CISTER/ISEP is a key partner in VALU3S, bringing know-how and experience in formal verification and artificial intelligence into several technical tasks and use cases, and is also the responsible for the leadership of the Dissemination, Communication and Exploitation work package, and leader of the General Dissemination task, both of which are key components of the project for ensuring that the results of the project reach the more relevant stakeholders (including industry working in automated systems, policy makers, and the general public).
More information in the VALU3S website, its Twitter, LinkedIn, and YouTube social accounts. If you want to be updated about progress in the project, please subscribe to the project’s newsletter.
This project has received funding from the ECSEL Joint Undertaking (JU) under grant agreement No 876852.

26, Jun, 2020

Achievements in Academia

New Master in Critical Computing Systems Engineering starting in ISEP

Applications are now open for the new MSc in Critical Computing Systems Engineering, sponsored by CISTER and with the scientific coordination of the unit’s Director, Eduardo Tovar.

This Master is designed to offer a suitable educational foundation for prospective students who want to become experts in the area of Critical Computing Systems. These include either recent graduates in areas such as Software Engineering, Electronics and Computers Engineering, Computer Science, and related fields, as well as professionals in these areas with similar qualifications.

Embracing the technological, human and organizational factors associated with the development of Critical Computing Systems, the ultimate objective of this 2-year MSc is to equip the students with the scientific foundations, the right engineering toolsets, and the necessary hands-on experience so that they are capable of performing informed assessment of the expected levels of safety typically demanded in this increasingly important class of systems. The MSc also provides a wide coverage of the knowledge involved in the development of Critical Computing Systems in the domains in which their successful application is of paramount importance, like Automotive, Avionics, Industrial Internet of Things, Banking and Finance, etc.

The MSc has a strong involvement of CISTER's industrial partners. Students successfully finishing the MSc are equipped both to work in the industry or pursue a research career, including a PhD.

Further information can be found on https://www.cister-labs.pt/mscccse/ or by sending an e-mail to msc@cister-labs.pt.

 

18, Dec, 2019

Fundamental Research Activities

CISTER Distinguished talk on “pWCET Reliability Evaluation for Measurement-Based Probabilistic Timing Analysis” with Prof. Rômulo Oliveira

9, Dec, 2019

Fundamental Research Activities

AQUAMON F2F meeting

28, Nov, 2019

Fundamental Research Activities

The Ultimate Vehicle Platooning Toolset

21, Nov, 2019

In Memoriam

Stefan M. Petters (1969-2019)

Stefan Petters was a prominent researcher at CISTER from 2009 until 2014. He was research line leader and also had the role of Vice-Director of CISTER. Stefan was an outstanding person, and his energy, wisdom, intelligence and team spirit were instrumental for the growth of CISTER-Labs. Stefan was a prominent member of the international community and his contributions will last long in the memories. Stefan sadly passed way last week, at the age of 50.

21, Nov, 2019

Fundamental Research Activities

European Forum for Electronic Components and Systems, in Helsinki, Finland

15, Nov, 2019

Fundamental Research Activities

Productive 4.0/ Arrowhead Tools meeting

13, Nov, 2019

Achievements in Academia

CISTER PhD Student won the Best Student Paper Award at RTNS 2019

CISTER PhD Student Ishfaq Hussain attended the 27th International Conference on Real-Time Networks and Systems (RTNS 2019) from 6th to 8th of November in Toulouse, France.
One full paper entitled "Response time analysis of multiframe mixed criticality systems" was published and presented in the main conference. The article, co-authored with Muhammad Ali Awan, Pedro F. Souto, Konstantinos Bletsas, Benny Akesson and Eduardo Tovar received the “Outstanding Paper” and “Best Student Paper” awards.
 

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