A Context Aware Cache Controller to Bridge the Gap Between Theory and Practice in Real-Time Systems

Yannick Allard; Geoffrey Nelissen; Joel Goossens; Dragomir Milojevic

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A Context Aware Cache Controller to Bridge the Gap Between Theory and Practice in Real-Time Systems
Ref: CISTER-TR-140704 Publication Date: 20 to 22, Aug, 2014

A Context Aware Cache Controller to Bridge the Gap Between Theory and Practice in Real-Time Systems

Ref: CISTER-TR-140704 Publication Date: 20 to 22, Aug, 2014

Authors:

Yannick Allard

Geoffrey Nelissen

Joel Goossens

Dragomir Milojevic

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The 20th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2014).
Chongqing, China.

Record Date: 4, Jul, 2014

Short links for this page: www.cister.isep.pt/docs/cister_tr_140704 www.cister.isep.pt/docs/934

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A Context Aware Cache Controller to Bridge the Gap Between Theory and Practice in Real-Time SystemsRef: CISTER-TR-140704 Publication Date: 20 to 22, Aug, 2014

A Context Aware Cache Controller to Bridge the Gap Between Theory and Practice in Real-Time Systems

A Context Aware Cache Controller to Bridge the Gap Between Theory and Practice in Real-Time Systems
Ref: CISTER-TR-140704 Publication Date: 20 to 22, Aug, 2014