October 14, 2011 - Vikram Gupta, ISEP, Portugal - ¶

Speaker Bio.: Vikram Gupta is a PhD candidate in Electrical and Computer Engineering in the Carnegie Mellon University (CMU) - Portugal joint program beginning August 2008 and is supervised by Prof. Raj Rajkumar (ECE-CMU) and Prof. Eduardo Tovar (ISEP-IPP). His current research includes developing clock synchronization methods for Wireless Sensor Networks. Before joining PhD program, he was working as a research associate at Indian Institute of Technology (I.I.T.) Delhi, India, where he focussed on Performance Assessment and Interoperability of WiMAX (802.16) on a Campus based Test Bed. He received his degree of Bachelor of Technology from National Institute of Technology (V.N.I.T.) Nagpur India in May 2007.

November 11, 2011 - Dakshina Dasari, ISEP, Portugal - Response Time Analysis of COTS-Based Multicores Considering the Contention on the Shared Memory Bus¶

Talk abstract: The current industry trend is towards using commercially available Off-The-Shelf (COTS) based multicores for developing real-time embedded systems, as opposed to the usage of custom-made hardware. In typical implementation of such COTS-based multicores, multiple cores access the main memory via a shared bus. This often leads to contention on this shared channel, which results in an increase of the response time of the tasks. Analyzing this increased response time, considering the contention on the shared bus, is challenging on COTS-based systems mainly because bus arbitration protocols are often undocumented and the exact instants at which the shared bus is accessed by tasks are not explicitly controlled by the operating system scheduler; they are instead a result of cache misses. This paper makes three contributions towards analyzing tasks scheduled on COTS-based multicores. Firstly, we describe a method to model the memory access patterns of a task. Secondly, we apply this model to analyze the worst case response time for a set of tasks. Although the required parameters to obtain the request profile can be obtained by static analysis, we provide an alternative method to experimentally obtain them by using performance monitoring counters (PMCs). We also compare our work against an existing approach and show that our approach outperforms it by providing tighter upper-bound on the number of bus requests generated by a task.

Speaker Bio.: Dakshina Dasari has been a member of the CISTER research lab in the Adaptive Real Time Systems group since September 2009. Her current area of work involves studying the analysis of the impact of shared resources on the WCET of tasks running on multicores. Her other interests involve reading and music.

December, 2011 ¶

Gurulingesh Raravi, ISEP, Portugal - ¶

Speaker Bio.: Gurulingesh Raravi finished his Masters Degree at IIT Bombay in 2005. He has three years of working experience. Currently, he is pursuing PhD in the area of Real-Time Scheduling on Heterogeneous Multiprocessor Platform.

Muhammad Ali Awan, ISEP, Portugal - ¶

Speaker Bio.: Muhammad Ali Awan did his master's Degree from Royal Institute of Technology(KTH) Sweden in System on Chip Design with a focus on Digital System Design and Embedded Systems. He worked as Lecturer in National University of Science and Technology Pakistan. He also worked as a researcher in IMEC, Belgium for two years. His research focus was on High Level Memory Management. Currently he started his PhD in Cister and participating in a research on "Real-Time Power Management on Partitioned Multicores".

February 10, 2012 ¶

Claro Noda, ISEP, Portugal - ¶

Speaker Bio.: Claro Noda graduated in Physics from University of Havana, Cuba in 1996. He worked in Scientific Instrumentation at the Superconductivity Laboratory, IMRE (1996-2001) where he completed his Master in Physical Sciences in 2000 and later continued research activities at the "Henri Poincaré" Complex Systems Group. He has also taught at the General Physics Department in the Faculty of Physics in Havana (2005-2008). Currently he's a MAP-Tele PhD student at University of Minho and a researcher at CISTER/ISEP, Portugal.

Borislav Nikolic, ISEP, Portugal - ¶

Speaker Bio.: Borislav graduated at the Faculty of Electrical Engineering in Belgrade with major in Computer Science in 2007. He spent almost two years in industry developing large-scale enterprise applications. Currently, Borislav is doing his PhD at CISTER/IPP-HURRAY Research unit. He is amateur road cyclist and big fan of FC Red Star Belgrade. His research interests include real time and embedded systems, distributed and parallel computing, gossip protocols, ORMs and software architecture and design.

February 24, 2012 ¶

Hossein Fotouhi, ISEP, Portugal - ¶

Speaker Bio.: Hossein received his degree on Electrical Electronics Engineering in 2004 and worked afterwards about three years in Iran in different places such as University of Guilan and Telecommunication Center as a network engineer. He obtained his Master of Science in Communication Network Engineering in 2009. His MSc thesis was on "optimising energy consumption in MAC layer for Wireless Sensor Networks". Currently, he is doing his PhD research in CISTER Research Unit since July 2009. His research interests are wireless sensor networks, mobility management, handoff mechanism and fuzzy logic theory.

Hazem Ali, ISEP, Portugal - ¶

Speakers Bio.: Hazem completed his MSc in Embedded and Intelligent Systems at the School of Information Science of the Halmstad University, Sweden, September 2010. He is currently doing his PhD at CISTER in the area of real-time languages.

April 8 - Ricardo Severino, ISEP, Portugal - ¶

Speaker Bio.: Ricardo Severino was born in 1982 and has a Degree (2006), and a MSc (2008) in Electrical and Computer Engineering at the Polytechnic Institute of Porto – School of Engineering (ISEP/IPP). Since 2006, he has been working in the area of Wireless Sensor Networks, namely on improving quality-of-service (QoS) in WSNs by using standard and commercial-off-the-shelf (COTS) technology, at the CISTER/IPP-HURRAY! Research Unit. In this line, he has been actively participating in the ART-WiSe (http://artwise.cister-isep.info) and Open-ZB (http://www.open-zb.net) research frameworks, as well as in international projects such as ArtistDesign (FP7 NoE on Embedded System Design), CONET (FP7 NoE on Cooperating Objects), and EMMON (FP7 JU on Embedded Monitoring). He is also a founding member and contributor of the 15.4 and ZigBee TinyOS Working Groups. Recently, his MSc Thesis work was awarded with the EWSN'09 Best MSc Thesis Award at the prestigious European Conference on Wireless Sensor Networks (EWSN'09). He has several publications in reputed conferences (e.g. MASS, RTCSA, ECRTS) and journals (e.g. IEEE TII) and has served as a reviewer for several conferences (e.g. IEEE ETFA, SUTC and VTC).

April 15 - Antonio Barros, ISEP, Portugal - ¶

Speaker Bio.: António Barros got his degree (1997) and MSc (2009) on Electrical and Computer Engineering (Telecommunication and Computers) at FEUP. He is a lecturer at ISEP since 2001 and collaborates with CISTER since 2005. He is an enthusiast of reliable software and fantasizes about fault-tolerant distributed systems. He claims being genetically unable to program any kind of graphical user interface and computers should be hidden from common people.

April 29 - Dakshina Dasari, ISEP, Portugal - ¶

Speaker Bio.: Dakshina Dasari has been a member of the CISTER research lab in the Adaptive Real Time Systems group since September 2009. Her current area of work involves studying the analysis of the impact of shared resources on the WCET of tasks running on multicores. Her other interests involve reading and music.

May 6 - Maryam Vahabi, ISEP, Portugal - ¶

Speaker Bio.: Maryam Vahabi received her degree in Electrical Engineering in 2003. She obtained her Master of Science in Communication Network Engineering in 2009. She has joined the CISTER research lab in July, 2009. Currently, she is working on the field of Wireless Sensor Network (WSN) and more specifically, WiDom protocol.

May 13 - José Marinho, ISEP, Portugal - ¶

Speaker Bio.: José Marinho is an Electrical Engineer conducting his PhD studies at CISTER. His topic of work is preemption delay estimation.

May 27 - Muhammad Ali Awan, ISEP, Portugal - ¶

June 3 - Ricardo Garibay-Martinez, ISEP, Portugal - ¶

Speaker Bio.: Ricardo received his Bachelors Degree from Morelia Institute of Technology (ITM) in 2007 and finished his Master of Science in Computer Science from Centre for Scientific Research and Higher Education of Ensenada (CICESE), Mexico. He has experience working as a lecturer and as a researcher for PEMEX Petroleum Company. Since 2007, he has been working in the area of Adaptive Resource Management in Distributed Dynamic Real-Time Systems. Currently, he is working as a researcher and PhD student in CISTER/IPP-HURRAY Research unit. His current research interest is Adaptive RT Systems.

July 1 - Artem Burmyakov, ISEP, Portugal - ¶

Speaker Bio.: Artem Burmyakov received a masters' degree in Computer Sciences from Moscow Engineering and Physics Institute. He worked as a software engineer within CERN for more than 4 years, participating in the LHC GCS and the UAB projects. Nowdays he is a doctoral student within CISTER. His professional interests are related to the development of control, real-time and distributed systems

July 15 - Claudio Maia , ISEP, Portugal - ¶

Cláudio Maia, born in 1980, holds a degree (2007) in Computer Science Engineering at the Polytechnic Institute of Oporto. From 2006 to 2009, he was a researcher and software engineer at Critical Software S.A. During that time, his main areas of research were mobile and wireless communication systems and manufacturing systems. Since October 2009, he is a Researcher in the CISTER Research Unit, involved in the CooperatES project. His main research interests are in the fields of Dynamic Distributed Real-time Systems, Operating Systems and Mobile and Wireless Communication Systems.

September 9 - Kostiantyn Berezovskyi, ISEP, Portugal- ¶

Speaker Bio.: Kostiantyn Berezovskyi holds M.Sc. degree from Taras Shevchenko National University of Kyiv. At university he paid great attention to software development and have gathered experience in parallel programming. Now he is a PhD student at CISTER. His interests are related to the schedulability analysis of general purpose graphics processor units.